I2C

SCPI Commands :

TRIGger:SBHW:I2C:TYPE
TRIGger:SBHW:I2C:ACCess
TRIGger:SBHW:I2C:AMODe
TRIGger:SBHW:I2C:DWNack
TRIGger:SBHW:I2C:DRNack
TRIGger:SBHW:I2C:ADNack
TRIGger:SBHW:I2C:ADDRess
TRIGger:SBHW:I2C:ADDTo
TRIGger:SBHW:I2C:DMIN
TRIGger:SBHW:I2C:ACONdition
TRIGger:SBHW:I2C:DCONdition
TRIGger:SBHW:I2C:DPOSition
Commands in total: 12
Subgroups: 0
Direct child commands: 12
get_access() → SbusIxcReadWriteBit[source]
# TRIGger:SBHW:I2C:ACCess
value: enums.SbusIxcReadWriteBit = driver.trigger.sbhw.i2C.get_access()

Toggles the trigger condition between read and write access of the primary. Select Either if the transfer direction is not relevant for the trigger condition.

Returns:

rwb_it_address: READ | WRITe | EITHer

get_acondition() → OperatorB[source]
# TRIGger:SBHW:I2C:ACONdition
value: enums.OperatorB = driver.trigger.sbhw.i2C.get_acondition()

Sets the operator to set a specific address or an address range. The address values are set with method RsMxo.trigger.sbhw.i2C.address() and method RsMxo.trigger.sbhw.i2C.add_to() .

Returns:

address_operator: EQUal | NEQual | LTHan | LETHan | GTHan | GETHan | INRange | OORange

get_ad_nack() → bool[source]
# TRIGger:SBHW:I2C:ADNack
value: bool = driver.trigger.sbhw.i2C.get_ad_nack()

Triggers if the address acknowledge bit is missing - no target recognizes the address.

Returns:

address_nack: OFF | ON

get_add_to() → List[int][source]
# TRIGger:SBHW:I2C:ADDTo
value: List[int] = driver.trigger.sbhw.i2C.get_add_to()

Sets the end value of an address range if the condition is set to an address range with method RsMxo.trigger.sbhw.i2C.acondition() .

get_address() → List[int][source]
# TRIGger:SBHW:I2C:ADDRess
value: List[int] = driver.trigger.sbhw.i2C.get_address()

Triggers on the specified address, or sets the start value of an address range depending on the condition set with method RsMxo.trigger.sbhw.i2C.acondition() .

get_amode() → SBusI2cAddressType[source]
# TRIGger:SBHW:I2C:AMODe
value: enums.SBusI2cAddressType = driver.trigger.sbhw.i2C.get_amode()

Sets the address length to be triggered on: 7 bit or 10 bit.

Returns:

address_type: Note that BIT7RW is the same address type as BIT7_RW.

  • BIT7 | BIT10: Enter only the seven or ten address bits in the address pattern.

  • BIT7RW | BIT7_RW: Enter seven address bits and also the read/write bit.

get_dcondition() → OperatorB[source]
# TRIGger:SBHW:I2C:DCONdition
value: enums.OperatorB = driver.trigger.sbhw.i2C.get_dcondition()

Sets the operator to set a specific data value or a data range.

Returns:

data_operator: EQUal | NEQual | LTHan | LETHan | GTHan | GETHan

get_dmin() → List[int][source]
# TRIGger:SBHW:I2C:DMIN
value: List[int] = driver.trigger.sbhw.i2C.get_dmin()

Specifies the data bit pattern, or sets the start value of a data pattern range. Enter the bytes in MSB first bit order. The maximum pattern length is 64 bit. Waveform data is compared with the pattern byte-by-byte.

get_dposition() → int[source]
# TRIGger:SBHW:I2C:DPOSition
value: int = driver.trigger.sbhw.i2C.get_dposition()

Sets the number of data bytes to be skipped after the address.

Returns:

data_position: 1 to 4096

get_dr_nack() → bool[source]
# TRIGger:SBHW:I2C:DRNack
value: bool = driver.trigger.sbhw.i2C.get_dr_nack()

Triggers on the end of the read process when the controller reads data from the target. This NACK is sent according to the protocol definition, it is not an error.

Returns:

data_read_nack: OFF | ON

get_dw_nack() → bool[source]
# TRIGger:SBHW:I2C:DWNack
value: bool = driver.trigger.sbhw.i2C.get_dw_nack()

Triggers if a date acknowledge bit is missing - the addressed target does not accept the data.

Returns:

data_write_nack: OFF | ON

get_type_py() → SbusI2cTriggerType[source]
# TRIGger:SBHW:I2C:TYPE
value: enums.SbusI2cTriggerType = driver.trigger.sbhw.i2C.get_type_py()

Selects the trigger type for I²C analysis.

Returns:

type_py: STARt | REPStart | STOP | NACK | ADDRess | DATA | ADAT

  • STARt: Start condition

  • REPStart: Repeated start - the start condition occurs without previous stop condition.

  • STOP: Stop condition, end of frame

  • NACK: Missing acknowledge bit. To localize specific missing acknowledge bits, use:TRIGger:SBHW:I2C:ADNackTRIGger:SBHW:I2C:DWNackTRIGger:SBHW:I2C:DRNack

  • ADDRess: Triggers on one specific address

  • DATA: Triggers on a specific data

  • ADAT: Triggers on a combination of address and data condition.

set_access(rwb_it_address: SbusIxcReadWriteBit) → None[source]
# TRIGger:SBHW:I2C:ACCess
driver.trigger.sbhw.i2C.set_access(rwb_it_address = enums.SbusIxcReadWriteBit.EITHer)

Toggles the trigger condition between read and write access of the primary. Select Either if the transfer direction is not relevant for the trigger condition.

Parameters:

rwb_it_address – READ | WRITe | EITHer

set_acondition(address_operator: OperatorB) → None[source]
# TRIGger:SBHW:I2C:ACONdition
driver.trigger.sbhw.i2C.set_acondition(address_operator = enums.OperatorB.EQUal)

Sets the operator to set a specific address or an address range. The address values are set with method RsMxo.trigger.sbhw.i2C.address() and method RsMxo.trigger.sbhw.i2C.add_to() .

Parameters:

address_operator – EQUal | NEQual | LTHan | LETHan | GTHan | GETHan | INRange | OORange

set_ad_nack(address_nack: bool) → None[source]
# TRIGger:SBHW:I2C:ADNack
driver.trigger.sbhw.i2C.set_ad_nack(address_nack = False)

Triggers if the address acknowledge bit is missing - no target recognizes the address.

Parameters:

address_nack – OFF | ON

set_add_to(address_to: List[int]) → None[source]
# TRIGger:SBHW:I2C:ADDTo
driver.trigger.sbhw.i2C.set_add_to(address_to = [1, 2, 3])

Sets the end value of an address range if the condition is set to an address range with method RsMxo.trigger.sbhw.i2C.acondition() .

set_address(address: List[int]) → None[source]
# TRIGger:SBHW:I2C:ADDRess
driver.trigger.sbhw.i2C.set_address(address = [1, 2, 3])

Triggers on the specified address, or sets the start value of an address range depending on the condition set with method RsMxo.trigger.sbhw.i2C.acondition() .

set_amode(address_type: SBusI2cAddressType) → None[source]
# TRIGger:SBHW:I2C:AMODe
driver.trigger.sbhw.i2C.set_amode(address_type = enums.SBusI2cAddressType.ANY)

Sets the address length to be triggered on: 7 bit or 10 bit.

Parameters:

address_type –

Note that BIT7RW is the same address type as BIT7_RW.

  • BIT7 | BIT10: Enter only the seven or ten address bits in the address pattern.

  • BIT7RW | BIT7_RW: Enter seven address bits and also the read/write bit.

set_dcondition(data_operator: OperatorB) → None[source]
# TRIGger:SBHW:I2C:DCONdition
driver.trigger.sbhw.i2C.set_dcondition(data_operator = enums.OperatorB.EQUal)

Sets the operator to set a specific data value or a data range.

Parameters:

data_operator – EQUal | NEQual | LTHan | LETHan | GTHan | GETHan

set_dmin(data: List[int]) → None[source]
# TRIGger:SBHW:I2C:DMIN
driver.trigger.sbhw.i2C.set_dmin(data = [1, 2, 3])

Specifies the data bit pattern, or sets the start value of a data pattern range. Enter the bytes in MSB first bit order. The maximum pattern length is 64 bit. Waveform data is compared with the pattern byte-by-byte.

set_dposition(data_position: int) → None[source]
# TRIGger:SBHW:I2C:DPOSition
driver.trigger.sbhw.i2C.set_dposition(data_position = 1)

Sets the number of data bytes to be skipped after the address.

Parameters:

data_position – 1 to 4096

set_dr_nack(data_read_nack: bool) → None[source]
# TRIGger:SBHW:I2C:DRNack
driver.trigger.sbhw.i2C.set_dr_nack(data_read_nack = False)

Triggers on the end of the read process when the controller reads data from the target. This NACK is sent according to the protocol definition, it is not an error.

Parameters:

data_read_nack – OFF | ON

set_dw_nack(data_write_nack: bool) → None[source]
# TRIGger:SBHW:I2C:DWNack
driver.trigger.sbhw.i2C.set_dw_nack(data_write_nack = False)

Triggers if a date acknowledge bit is missing - the addressed target does not accept the data.

Parameters:

data_write_nack – OFF | ON

set_type_py(type_py: SbusI2cTriggerType) → None[source]
# TRIGger:SBHW:I2C:TYPE
driver.trigger.sbhw.i2C.set_type_py(type_py = enums.SbusI2cTriggerType.ADAT)

Selects the trigger type for I²C analysis.

Parameters:

type_py –

STARt | REPStart | STOP | NACK | ADDRess | DATA | ADAT

  • STARt: Start condition

  • REPStart: Repeated start - the start condition occurs without previous stop condition.

  • STOP: Stop condition, end of frame

  • NACK: Missing acknowledge bit. To localize specific missing acknowledge bits, use:TRIGger:SBHW:I2C:ADNackTRIGger:SBHW:I2C:DWNackTRIGger:SBHW:I2C:DRNack

  • ADDRess: Triggers on one specific address

  • DATA: Triggers on a specific data

  • ADAT: Triggers on a combination of address and data condition.